This invention relates to fluorescent lamp ballasts incorporating an integrated circuit. More particularly, the invention relates to such ballasts including additional circuitry for protecting the ballast when one or more of the following three conditions occur: (1) the lamp starting to significantly rectify current in either direction, (2) the lamp voltage exceeding a predetermined level for a significant time such as half a minute, and (3) the power mains supply voltage falling below a predetermined level.
Ballasts, or power-supply, circuits for fluorescent lamps can benefit from incorporating complex circuit functions in integrated circuit (IC) form. Widely available, low cost IC""s can include various functions, such as driving a switching arrangement that provides AC power for the lamp. It would be desirable to inexpensively complement the widely available IC""s, with protection from one or more of the following three conditions: (1) the lamp starting to significantly rectify current in either direction, (2) the lamp voltage exceeding a predetermined level for a prolonged duration, and (3) the power mains supply voltage falling below a predetermined level.
A preferred embodiment of the invention protects from all of the foregoing three conditions relating to (1) lamp rectification, (2) excessive lamp voltage, and (3) low line voltage comprises the following circuitry. That embodiment comprises a gas discharge lamp ballast in which a resonant load circuit for at least one lamp includes a DC blocking capacitor connected between a reference node and the at least one lamp. A switching arrangement includes first and second switches serially connected between a rail node at a DC potential and the reference node, for supplying AC current to the load via a midpoint node between the first and second switches. This embodiment protects against all three conditions in a ballast having an integrated circuit including (1) a driver for the switching arrangement including control means to create a frequency sweep from a pre-heat frequency, through a substantially lower, resonant frequency, to a still lower operating frequency, (2) a pre-heat pin for triggering the control means to re-start a frequency sweep in response to a re-start signal that exceeds a threshold level, (3) a shut-down pin associated with an internal shut-down latch for shutting down the driver in response to a shut-down signal that exceeds a threshold level, and (4) a pin at a preset voltage during normal operation and whose impedance to the reference node determines frequency of operation of the switching arrangement.
The ballast also includes first through fourth protection circuits:
(1) The first protection circuit compares a first voltage representing an average voltage on the midpoint node with a second voltage representing the voltage of the DC blocking capacitor, and for sending a shut-down signal to the shut-down pin when one of the first and second voltages exceeds the other by respective predetermined amounts.
(2) A second protection circuit has an output coupled to the pre-heat pin for detecting a brief period of substantially excessive lamp voltage when a lamp has not yet started in response to current spikes through a switch of the switching arrangement and, in turn, for supplying the pre-heat pin with a re-start signal.
(3) A third protection circuit detects a longer period of less excessive lamp voltage; the third protection circuit including a DC amplifier with a response time substantially longer than the brief period for amplifying a signal representing the output of the second protection circuit and providing the resulting signal to the shut-down pin. The first and third protection circuits share an auxiliary circuit that prevents each of them from continually sending a shut-down signal to the shut-down pin.
(4) A fourth protection circuit lowers the mentioned impedance when a voltage representing the magnitude of an AC input voltage falls below the mentioned preset voltage by a predetermined amount.
A ballast may incorporate any one or any combination of the foregoing protection circuits.